The Three-Stage Materials Flow
Stage I
- Silicon from quartz / silica
- Germanium from zinc smelting
- Copper, aluminium, tungsten, tantalum
- Dopants: Boron, Phosphorus, Arsenic
- Rare earths: Hafnium, Cerium, Lanthanum
- Tin, gold, silver for bonding
Stage II
Intermediate Materials
- Polysilicon (9N purity)
- Single-crystal ingots & wafers
- Compound wafers: GaN, GaAs, InP, SiGe
- Thin-film targets: TaN, TiN, HfO₂
- Photoresists & process chemicals
Stage III
Final Processing & Packaging
- Copper / cobalt / tungsten interconnects
- Tantalum & titanium diffusion barriers
- Gold, tin, nickel for wire bonding
- Solder & thermal interface materials
- Protective encapsulants & substrates
Raw Materials
| Material | Source | Role in Semiconductor Manufacturing |
|---|---|---|
| Silicon | Quartz sand | Primary substrate for wafers |
| Gallium | Bauxite ore | High-speed chip compounds (GaN, GaAs) |
| Germanium | Zinc smelting | High-speed transistors & optoelectronics |
| Rare Earth Metals | China-dominated mines | Advanced chip dielectrics & polishing |
| Indium | Zinc ores | Indium tin oxide (ITO) — displays & contacts |
| Boron / Phosphorus / Arsenic | Chemical production | Dopants — control electrical conductivity |
| Copper | Mining | On-chip interconnect wiring |
| Tin / Lead | Mining | Soldering & packaging |
| Intermediate | Derived From | Function |
|---|---|---|
| Silicon Wafers | Quartz sand → polysilicon → ingots | Base substrate on which circuits are built |
| Photoresist & Photomasks | Polymers & chemicals | Enable precise circuit patterning via lithography |
| Doped Wafers | Silicon + dopant elements | Set p-type / n-type electrical characteristics |
| Thin-Film Layers | Copper, tungsten, TaN, TiN, HfO₂ | Build multi-layer chip structures (nanometre-thin) |
| Interconnect Structures | Copper / cobalt | Create connections between transistors |
| Packaged Dies | Fabricated & tested wafers | Final deliverable — ready for device integration |
From Sand to Silicon
01
Wafer Preparation
Pure silicon is extracted from quartz, melted into crystal ingots, and sliced into ultra-thin wafers. Photoresist coating is applied to the surface.
02
Lithography
Circuit patterns are projected onto the wafer using EUV or DUV light through precision photomasks, transferring the chip blueprint onto the surface.
03
Etching & Doping
Unwanted silicon is carved away via chemical etching. Ion implantation introduces dopants to precisely tune the electrical properties of each region.
04
Layering
Hundreds of material layers are deposited sequentially — each only nanometres thick — building up the full transistor and interconnect architecture.
05
Metallisation
Copper or aluminium is deposited to wire all transistors and functional elements together into a working integrated circuit.
06
Test & Package
Each wafer undergoes electrical testing. Known-good dies are cut, encased in protective packaging, and prepared for integration into end devices.
Advanced Material Platforms
Gallium Nitride
GaN
Enables high-voltage, high-frequency operation with lower energy loss and reduced device size — critical for next-generation power systems.
Silicon Carbide
SIC
Manages higher voltages and temperatures than standard silicon or GaN — ideal for heavy-duty power conversion in EVs and grid infrastructure.
Indium Arsenide
INAS
Very high electron mobility and strong infrared response make InAs indispensable for sensing, imaging, and quantum-scale devices.